Gowin SDI Encoder IP
Jagorar Mai Amfani
SDI IP Encoder
Haƙƙin mallaka © 2025 Guangdong Gowin Semiconductor Corporation. Duka Hakkoki.
alamar kasuwanci ce ta Kamfanin Guangdong Gowin Semiconductor Corporation kuma an yi rajista a China, Ofishin Alamar kasuwanci da alamar kasuwanci ta Amurka, da sauran ƙasashe. Duk sauran kalmomi da tambura da aka gano azaman alamun kasuwanci ko alamun sabis mallakin masu riƙe su ne. Ba wani sashe na wannan takarda da za a iya sake bugawa ko watsa ta kowace hanya ko ta kowace hanya, na lantarki, injiniyoyi, kwafi, rikodi ko akasin haka, ba tare da rubutaccen izinin GOWINSEMI ba.
Disclaimer
GOWINSEMI ba ta da wani alhaki kuma ba ta bayar da garanti (ko bayyana ko bayyana) kuma ba shi da alhakin duk wani lahani da aka yi wa kayan aikinku, software, bayanai, ko dukiyoyin ku sakamakon amfani da kayan ko kayan fasaha sai dai kamar yadda aka bayyana a cikin Sharuɗɗa da Sharuɗɗa na GOWINSEMI. ta Sale. GOWINSEMI na iya yin canje-canje ga wannan takarda a kowane lokaci ba tare da sanarwa ba. Duk wanda ya dogara da wannan takaddun ya tuntuɓi GOWINSEMI don takardun da ke yanzu.
Tarihin Bita
| Kwanan wata | Sigar | Bayani |
| 04/11/2025 | 1.0E | An buga sigar farko. |
| 05/14/2025 | 1.1E | Audio supported. Compatibility enhanced. |
| 07/25/2025 | 1.2E | Level B DS supported. IP port diagram and corresponding port descriptions updated. The reference design block diagram updated. |
| 09/12/2025 | 1.3E | Level B DL supported. |
Game da Wannan Jagorar
1.1 Manufar
Manufar Gowin SDI Encoder IP shine don taimaka muku koyon fasali da amfani da Gowin SDI Encoder IP ta hanyar ba da kwatancen fasali, ayyuka, tashar jiragen ruwa, lokaci, GUI da ƙirar ƙira, da sauransu. Hotunan hotunan software da samfuran tallafi da aka jera a cikin wannan jagorar sun dogara ne akan Gowin Software 1.9.12 (64-bit). Kamar yadda software ɗin ke iya canzawa ba tare da sanarwa ba, wasu bayanan ƙila ba za su ci gaba da dacewa ba kuma suna iya buƙatar gyara bisa ga software ɗin da ake amfani da su.
1.2 Takardu masu alaƙa
Ana samun sabbin jagororin masu amfani akan GOWINSEMI website. Kuna iya samun takaddun da ke da alaƙa a www.gowinsemi.com:
- DS981, GW5AT jerin Bayanan Samfuran FPGA
- DS1103, GW5A jerin Bayanan Samfuran FPGA
- DS1239, GW5AST jerin Bayanan Samfuran FPGA
- DS1105, GW5AS jerin Bayanan Samfuran FPGA
- DS1108, GW5AR jerin bayanan samfuran FPGA
- DS1118, GW5ART jerin Bayanan Samfuran FPGA
- SUG100, Jagorar Mai Amfani da Software na Gowin
1.3 Kalmomi da Gajarta
Tebu na 1-1 yana nuna gajerun hanyoyi da kalmomin da aka yi amfani da su a cikin wannan littafin.
Tebur 1-1 Kalmomi da Gajarta
| Kalmomi da Gajarta | Ma'ana |
| DE | Kunna Bayanai |
| Farashin FPGA | Filin Shirye Shirye Shirye da Kofa |
| HS | Daidaita Taɗi |
| IP | Dukiyar Hankali |
| SDI | Serial Digital Interface |
| Ser Des | Serializer/Deserializer |
| SMPTE | Ƙungiyar Injiniyoyin Hoto da Talabijin |
| VESA | Ƙungiyar Ma'auni na Bidiyo |
| VS | A tsaye Daidaitawa |
1.4 Taimako da Ra'ayoyin
Gowin Semiconductor yana ba abokan ciniki cikakken goyon bayan fasaha. Idan kuna da wasu tambayoyi, sharhi, ko shawarwari, da fatan za a ji daɗin tuntuɓar mu kai tsaye ta amfani da bayanin da aka bayar a ƙasa.
Website: www.gowinsemi.com
Imel: support@gowinsemi.com
Ƙarsheview
2.1 Samaview
Serial Digital Interface (SDI) memba ne na dangin mu'amalar bidiyo na dijital kuma ana amfani dashi don watsa siginar bidiyo na dijital. Gowin SDI Encoder IP na iya aiki a ƙarƙashin HD ko 3G ƙimar ƙimar da aka ayyana ta Society of Motion Picture and Television Engineers (SMPTE), canza siginar bidiyo zuwa siginar SDI.
Tebur 2-1 Gowin SDI Encoder IP
| Gowin SDI Encoder IP | |
| Albarkatun Hankali | Da fatan za a koma zuwa Tebur 2-2. |
| Bayar da Doc. | |
| Zane Files | Verilog (rufewa) |
| Tsarin Magana | Verilog |
| Gwajin Bench | Verilog |
| Gwaji da Zane-zane | |
| Software na Synthesis | Gowin Synthesis |
| Aikace-aikacen Software | Gowin Software (V1.9.11 da sama) |
A kula!
Don na'urorin da aka tallafa, za ku iya danna nan don samun bayanai.
2.2 Fasali
- Yana aiki da layi 1
- Yana goyan bayan ƙimar hanyar haɗin gwiwa na 1.485/2.97 Gbps akan layi
- Yana goyan bayan HD-SDI da 3G-SDI
- Yana goyan bayan sauti
- Supports Level B DS
- Supports Level B DL
2.3 Amfani da Albarkatu
Gowin SDI Encoder IP can be implemented by Verilog. Its performance and resource utilization may vary when the design is employed in different devices, or at different densities, speeds, or grades.
Taking Gowin GW5AT series of FPGA as an instance, the resource utilization of Gowin SDI Encoder IP is as shown in Table 2-2.
Tebur 2-2 Gowin SDI Encoder IP Amfani da Albarkatun Albarkatu
| Na'ura | GW5AT-60 |
| Yi rijista | 3355 |
| LUT | 2523 |
| Farashin BSRAM | 16 |
Bayanin Aiki
3.1 Tsarin Toshe Tsarin
Gowin SDI Encoder IP na iya canza siginar bidiyo zuwa siginar SDI. Ana haɗa siginar SDI a cikin SDI PHY IP. Tsarin toshe na Gowin SDI Encoder IP yana kamar yadda aka nuna a hoto 3-1.
3.2 Function Modules
Kamar yadda aka nuna a cikin zanen da ke sama, Gowin SDI Encoder IP na iya canza bayanan bidiyo zuwa bayanan SDI.
3.3 Tsarin Tallafi
Tebur 3-1 yana nuna tsarin Gowin SDI Encoder IP yana goyan bayan.
Tebur 3-1 Tsarin Gowin SDI Encoder IP yana goyan bayan
| Daidaitawa | HD-SDI and Level B DS | 3G-SDI | |||||
| Hoton Addr Pixel | 1280 | 1280 | 1920 | 1920 | 1920 | 1920 | 1920 |
| Ver Addr Line | 720 | 720 | 1080 | 1080 | 1080 | 1080 | 1080 |
| Hor Total Pixel | 1650 | 1980 | 2200 | 2640 | 2750 | 2200 | 2640 |
| Ver Total Line | 750 | 750 | 1125 | 1125 | 1125 | 1125 | 1125 |
| Yanayin Scan | Na ci gaba | Na ci gaba | Na ci gaba | Na ci gaba | Na ci gaba | Na ci gaba | Na ci gaba |
| Matsakaicin Tsari | 60 | 50 | 30 | 25 | 24 | 60 | 50 |
| Bit Per Word | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Yawan Kalma (Mhz) | 74.25 | 74.25 | 74.25 | 74.25 | 74.25 | 148.5 | 148.5 |
| Pixel Sampda Rate (Mhz) | 74.25 | 74.25 | 74.25 | 74.25 | 74.25 | 148.5 | 148.5 |
| Tsarin | YC4:2:2 | YC4:2:2 | YC4:2:2 | YC4:2:2 | YC4:2:2 | YC4:2:2 | YC4:2:2 |
| Zurfin pixel | 10 | 10 | 10 | 10 | 10 | 10 | 10 |
3.4 Jerin Tashoshi
Ana nuna tashar IO na Gowin SDI Encoder IP a cikin Hoto 3-3.
Tashar jiragen ruwa na IO sun bambanta kadan dangane da sigogi.
Ana nuna cikakkun bayanai na tashar IO na Gowin SDI Encoder IP a cikin Tebu 3-2.
Teburin 3-2 I/O na Gowin SDI Encoder IP
| Sunan siginar | Hanyar | Nisa | Bayani |
| I_ rst_n | I | 1 | Sake saitin sigina, mai aiki-ƙananan. |
| I_ level | I | 2 | Zaɓin matakin 0: Level A 1: Level B DS 2: Ajiye 3: Ajiye |
| I_ rate | I | 3 | Rate input: 0: Ajiye 1: HD-SDI 2: 3G-SDI |
| I_ hres | I | 16 | Shigar da ƙuduri na kwance |
| I_ vres | I | 16 | Shigar da ƙuduri a tsaye |
| I_ ver_fre | I | 3 | Vertical frequency input 0: 60 Hz 1: 50 Hz 2: 30 Hz 3: 25 Hz 4: 24 Hz |
| I_ interlace | I | 1 | Interlace input 0: Ajiye 1: Progressive (P) |
| I_ color | I | 1 | Color input 0: YC 1: Ajiye |
| I_ mfactor | I | 1 | M factor input 0: M = 1 1: Ajiye |
| I_ pixbit | I | 1 | Pixel bit input 0:10 zuw 1: Ajiye |
| I_ pixstruc | I | 2 | Pixel structure input 2’b00: 4:2:2 2'b01: Ajiye 2'b10: Ajiye 2'b11: Ajiye |
| I_ clk | I | 1 | Shigar da agogo |
| I_ fld | I | 1 | Video field input (odd/even |
| I_ vs | I | 1 | Video VS (vertical sync) input (positive polarity) |
| I_ hs | I | 1 | Video HS (horizontal sync) input (positive polarity) |
| I_ de | I | 1 | Video DE (data enable) input |
| I_ data |
I |
40 |
Video data input 20 bits for Level A 40 bits for Level B DS (Ser Des rate set to 2.97, Data Width = 20, Data Ratio = 1:2) |
| I_ audio_g1_de | I | 1 | Audio DE input, 48 KHz |
| I_ audio_g1_data | I | 96 | Shigar da bayanan audio |
| O_ audio_ req | O | 1 | Audio data request, 48 KHz |
| O_ data | O | 80 | Encoded data output, connected to Gowin SDI PHY IP. |
3.5 Bayanin Lokaci
This section introduces the timing of Gowin SDI Encoder IP. Figure 3-4 shows the input interface timing diagram of Gowin SDI Encoder IP. For standard video, simply connect the corresponding signals, and the IP will perform encoding. The encoded data is then output to Gowin SDI PHY IP.
Hoto na 3-4 Tsare-tsare Tsare-tsare na Interface Input Video
Haɓaka Kan Gano
Kuna iya amfani da kayan aikin janareta na IP a cikin Software na Gowin don kira da daidaita Gowin SDI Encoder IP.
- Bude IP Core Generator
Bayan ƙirƙirar aikin, danna shafin "Kayan aiki" a hagu na sama, danna "IP Core Generator" daga jerin abubuwan da aka saukar don buɗe Gowin IP Core Generator, kamar yadda aka nuna a hoto na 4-1.
Hoto 4-1 Buɗe IP Core Generator
- Zaɓi SDI Encoder IP.
Danna sau biyu "Multimedia" kuma zaɓi SDI Encoder don buɗe SDI Encoder IP sanyi dubawa, kamar yadda aka nuna a cikin Hoto 4-2.
- Gowin SDI Encoder IP Configuration Interface First configure “General” tab in the SDI Encoder IP interface as shown in Figure 4-3.
Device, Device Version, Part Number: Part number settings, determined by the current project, and the user can not configure it.
Language: Supports Verilog and VHDL; choose the language as requirements, and the default is Verilog.
File Name, Module Name, Create In: Displays Ser Des file suna, module sunan da aka samar file hanya.
- Danna "Ok" kai tsaye don samar da IP.
Tsarin Magana
This chapter is intended to introduce the usage and structure of the reference design of Gowin SDI Encoder IP. Please see the SDI PHY IP Reference Design for details at Gowin semi website.
Wannan ƙirar ƙira tana ɗaukar DK_START_GW5AT-LV60PG484A_V1.1 a matsayin tsohonample. For more information about DK_START_GW5AT-LV60PG484A_V1.1 development board, please refer to Gowin semi website. An nuna zanen toshe na ƙirar tunani a cikin hoto 5-1.
File Bayarwa
The file isarwa don Gowin SDI Encoder IP ya haɗa da takaddun, lambar tushen ƙira, da ƙirar ƙira.
6.1 Takardu
Tebur 6-1 Jerin Takardu
| Suna | Bayani |
| IPUG1025, Gowin SDI Encoder IP Jagorar Mai Amfani | Gowin SDI Encoder IP Jagorar mai amfani, watau, wannan jagorar. |
6.2 Lambar Tushen Zane (Rufewa)
Babban fayil ɗin lambar rufaffen ya ƙunshi rufaffen lambar RTL don Gowin SDI Encoder IP. An yi nufin wannan lambar don amfani tare da GUI don samar da ainihin IP kamar yadda ake buƙata.
Table 6-2 File Jerin Gowin SDI Encoder IP
| Suna | Bayani |
| sdi_ encoder. v | SDI Decoder IP File, rufaffen. |
6.3 Tsarin Magana
The Ref Design folder contains the netlist files, ƙirar masu amfani, ƙuntatawa files, babban matakin files, da kuma aikin files don Gowin SDI PHY IP, Gowin SDI Encoder IP, da Gowin SDI Decoder IP.
Table 6-2 Gowin SDI Encoder IP Ref Design Folder Content List
| Suna | Bayani |
| bidiyo_top.v | Babban module na tunani zane |
| tsarin gwaji.v | Gwajin ƙirar ƙirar ƙirar ƙira |
| dk_video.cst | Matsalolin jiki na aikin file |
| dk_video.sdc | Ƙuntataccen lokacin aikin file |
| key_debounceN.v | Maɓalli na ɓarna |
| adv7513_iic_init.v | Saukewa: adv7513 file |
| yc_zuwa_rgb | yc_to_rgb babban fayil |
| rgb_zuwa_yc | rgb_to_yc babban fayil |
| i2c_maigida | I2c_master babban fayil, rufaffen. |
| sdi_decoder | sdi_decoder folder, encrypted. |
| sdi_encoder | sdi_decoder folder, encrypted. |
| serdes | Ser Des project folder, encrypted. |
| gowin_pll | gowin_pll folder |
| sdi_audio_buffer_pro | sdi_audio_buffer_pro folder |
| i2s_interface | i2s_interface folder |
Takardu / Albarkatu
 |
GOWIN SDI IP Encoder [pdf] Jagorar mai amfani SDI IP Encoder, IP Encoder, Encoder |